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Commit 1ef232d2 authored by Pat Erley's avatar Pat Erley
Browse files

Revert "Apply correct, optimized mfpu compiler flag for ARMv7-A Cortex CPUs" 

This reverts commit 8dd9ea10.

Using the new mfpu values was causing cts failures on arches that are
only 32-bit capable:

 public static native double
	java.lang.StrictMath.tan(double): 0.4595594355798443:
				expected:<0.4949001792881326>
				 but was:<0.49490017928813257>

Conflicts:
	core/clang/arm.mk
	core/combo/arch/arm/armv7-a-neon.mk

CYNGNOS-1309

Change-Id: I57bb063a33121d42f8facb05e7fdda3b384209bc
(cherry picked from commit 531e203e)
parent 34326220

core/clang/arm.mk

+1 −2
Original line number Diff line number Diff line
@@ -27,6 +27,5 @@ CLANG_CONFIG_arm_UNKNOWN_CFLAGS := \ 
define subst-clang-incompatible-arm-flags

  $(subst -march=armv5te,-march=armv5t,\

  $(subst -march=armv5e,-march=armv5,\

  $(subst -mfpu=neon-vfpv4,-mfpu=neon,\

  $(1))))

  $(1)))

endef

core/combo/arch/arm/armv7-a-neon.mk

+8 −7
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ ARCH_ARM_HAVE_VFP_D32 := true 
ARCH_ARM_HAVE_NEON              := true



ifneq (,$(filter cortex-a15 denver krait,$(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)))

	arch_variant_cflags := -mcpu=cortex-a15 -mfpu=neon-vfpv4

	arch_variant_cflags := -mcpu=cortex-a15



	# Fake an ARM compiler flag as these processors support LPAE which GCC/clang

	# don't advertise.
@@ -16,26 +16,26 @@ ifneq (,$(filter cortex-a15 denver krait,$(TARGET_$(combo_2nd_arch_prefix)CPU_VA 
		-Wl,--no-fix-cortex-a8

else

ifeq ($(strip $(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)),cortex-a9)

	arch_variant_cflags := -mcpu=cortex-a9 -mfpu=neon

	arch_variant_cflags := -mcpu=cortex-a9

	arch_variant_ldflags := \

		-Wl,--no-fix-cortex-a8

else

ifneq (,$(filter cortex-a8 scorpion,$(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)))

	arch_variant_cflags := -mcpu=cortex-a8 -mfpu=neon

	arch_variant_cflags := -mcpu=cortex-a8

	arch_variant_ldflags := \

		-Wl,--fix-cortex-a8

else

ifeq ($(strip $(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)),cortex-a7)

	arch_variant_cflags := -mcpu=cortex-a7 -mfpu=neon-vfpv4

	arch_variant_cflags := -mcpu=cortex-a7

	arch_variant_ldflags := \

		-Wl,--no-fix-cortex-a8

else

ifeq ($(strip $(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)),cortex-a5)

	arch_variant_cflags := -mcpu=cortex-a7 -mfpu=neon-vfpv4

	arch_variant_cflags := -mcpu=cortex-a7

	arch_variant_ldflags := \

		-Wl,--no-fix-cortex-a8

else

	arch_variant_cflags := -march=armv7-a -mfpu=neon

	arch_variant_cflags := -march=armv7-a

	# Generic ARM might be a Cortex A8 -- better safe than sorry

	arch_variant_ldflags := \

		-Wl,--fix-cortex-a8
@@ -46,4 +46,5 @@ endif 
endif



arch_variant_cflags += \

    -mfloat-abi=softfp
 
    -mfloat-abi=softfp \

    -mfpu=neon