iommu/arm-smmu: prefer stage-1 mappings where we have a choice
For an SMMU that supports both Stage-1 and Stage-2 mappings (but not nested translation), then we should prefer stage-1 mappings as we otherwise rely on the memory attributes of the incoming transactions for IOMMU_CACHE mappings. Change-Id: Ic2b885c55dabe1af7efde2ffc70690d0e2d1bf34 Signed-off-by:Will Deacon <will.deacon@arm.com> Git-commit: 9c5c92e35cf5c4f7ee523d62a6bf9d5dc290350b Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git Signed-off-by:
Mitchel Humpherys <mitchelh@codeaurora.org>
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