USB: ci13xxx_udc: Don't wait infinitely in bus reset

The current code infinitely waits for all bits in PRIME register to be
cleared by the controller during bus reset.  In some error scenarios,
controller is not clearing PRIME register contents.  When this happens
the target crashes due to watchdog bark.  Convert this infinite loop
to finite loop.  Also convert controller reset loop to finite loop.

CRs-Fixed: 482867
Change-Id: I2e13ad8f53e8dbb2b9939dd13bf3ef8091d55058
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>