Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit f6259f18 authored by Girish Mahadevan's avatar Girish Mahadevan Committed by Stephen Boyd
Browse files

msm: pm-8x60: Modify L2 management mechanism in power collapse



Modify the L2 cache flush mechanism during Power collapse. For targets
with external L2 and TZ, L2 can only be flushed and not disabled as this
a secure operation. For targets with external L2 and no TZ kernel can flush
and disable the L2 cache. The decision on which cache flush mechanism to
use is determined by the power collapse type being exercised on that
platform.
Also modify the usage of qtimer based on target specific configuration
instead of using a socinfo based API to determine CPU type.

Signed-off-by: default avatarGirish Mahadevan <girishm@codeaurora.org>
Change-Id: Ib937c15782760cb81e19ac7093cb1c4fffd36afd
parent 91229a54
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment