gpio: msm-v3: Clear the interrupt status by writing 0
With TLMM-V3, the GPIO_INTR_STATUS register now requires
us to write 0 to clear the interrupt status. Earlier TLMM
versions required us to write 1 to clear the interrupt status.
Change-Id: Ic96ab6f3850fd4ac1164761c8f71c88e57fd4de5
Signed-off-by:
Rohit Vaswani <rvaswani@codeaurora.org>
Loading
Please register or sign in to comment