ARM: dts: msm add coresight byte counter interrupt for 8092

The CoreSight block can produce an interrupt on transfer of
programmed number of bytes to ETR-memory. Add device tree
entry to support this feature.

Change-Id: Ia1c3a045b78380e3f739af590e5329a12c9552e2
Signed-off-by: Vignesh Radhakrishnan <vigneshr@codeaurora.org>