msm: hsic: Disallow processor idle sleep while driving resume signal

HSIC controller should send SOF with in 3 msec after completing
the resume signal.  If processor is in idle sleep state, the timer
interrupt generated by HSIC controller to indicate resume completion
gets delayed.  If the interrupt handler is not run with in 3msec
after resume, the resume sequence is repeated.  Disallow processor
idle sleep to avoid multiple resume cycles.

CRs-Fixed: 397154
Change-Id: Ibc8965ad8bcd94e0b1b1d39b5b2ad8f39cf51095
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>