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Commit e8b4b325 authored by minz1's avatar minz1
Browse files

Merge tag 'v3.10.83' into cm-14.1 

This is the 3.10.83 stable release
parents a98a1a2d c4846542

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 3

PATCHLEVEL = 10

SUBLEVEL = 82

SUBLEVEL = 83

EXTRAVERSION =

NAME = TOSSUG Baby Fish

arch/arm/mach-dove/common.c

+1 −1
Original line number Diff line number Diff line
@@ -226,7 +226,7 @@ void __init dove_init_early(void) 
	orion_time_set_base(TIMER_VIRT_BASE);

	mvebu_mbus_init("marvell,dove-mbus",

			BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,

			DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ);

			DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ, 0);

}



static int __init dove_find_tclk(void)

arch/arm/mach-imx/clk-imx6q.c

+1 −1
Original line number Diff line number Diff line
@@ -515,7 +515,7 @@ int __init mx6q_clocks_init(void) 
	clk[gpmi_io]      = imx_clk_gate2("gpmi_io",       "enfc",              base + 0x78, 28);

	clk[gpmi_apb]     = imx_clk_gate2("gpmi_apb",      "usdhc3",            base + 0x78, 30);

	clk[rom]          = imx_clk_gate2("rom",           "ahb",               base + 0x7c, 0);

	clk[sata]         = imx_clk_gate2("sata",          "ipg",               base + 0x7c, 4);

	clk[sata]         = imx_clk_gate2("sata",          "ahb",               base + 0x7c, 4);

	clk[sdma]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);

	clk[spba]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);

	clk[ssi1_ipg]     = imx_clk_gate2("ssi1_ipg",      "ipg",               base + 0x7c, 18);

arch/arm/mach-kirkwood/common.c

+1 −1
Original line number Diff line number Diff line
@@ -531,7 +531,7 @@ void __init kirkwood_init_early(void) 


	mvebu_mbus_init("marvell,kirkwood-mbus",

			BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,

			DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);

			DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ, 0);

}



int kirkwood_tclk;

arch/arm/mach-mv78xx0/common.c

+2 −2
Original line number Diff line number Diff line
@@ -337,11 +337,11 @@ void __init mv78xx0_init_early(void) 
	if (mv78xx0_core_index() == 0)

		mvebu_mbus_init("marvell,mv78xx0-mbus",

				BRIDGE_WINS_CPU0_BASE, BRIDGE_WINS_SZ,

				DDR_WINDOW_CPU0_BASE, DDR_WINDOW_CPU_SZ);

				DDR_WINDOW_CPU0_BASE, DDR_WINDOW_CPU_SZ, 0);

	else

		mvebu_mbus_init("marvell,mv78xx0-mbus",

				BRIDGE_WINS_CPU1_BASE, BRIDGE_WINS_SZ,

				DDR_WINDOW_CPU1_BASE, DDR_WINDOW_CPU_SZ);

				DDR_WINDOW_CPU1_BASE, DDR_WINDOW_CPU_SZ, 0);

}



void __init_refok mv78xx0_timer_init(void)