PM / devfreq: Fix IRQ clearing in bimc-bwmon

The clearing of the BIMC BWMON IRQ needs clearing bits in two separate
registers. One is a global register and the other is a port specific
register.

The bit in the port specific register needs to be cleared first before
clearing the bit in the global register. Otherwise, the bit in the global
register gets set again before the port specific bit is cleared. Since
these register are in different address regions, we also need memory
barriers around writes to the global register.

Also, clear the counter value before clearing the interrupt status just to
be safe.

Change-Id: Iee8d2caf9bf7d639c65ed19c979036bd5e203bfd
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>