msm: mdss: avoid corner cases with DSI_INT_CTRL register read/write

To enable/disable a particular interrupt mask for DSI, we currently
read the DSI_INT_CTRL register and add/remove the interrupt mask on
top of the current register value. With this approach, we sometimes
clear some interrupts without handling them. Handle this case by
writing back only the required interrupt mask bits to the
DSI_INT_CTRL register.

Below is an instance of such issue when a DSI register read
operation is performed.

<3>[  342.509070] mdss_dsi_isr: ndx=0 isr=3200002
             -> At first, DSI error interrupt is received.

<3>[  342.512239] mdss_dsi_err_intr_ctrl: intr=1310003 enable=0
             -> During DSI_INT_CTRL read/write operation,
we clear the CMD_DMA_DONE interrupt which arrives few milli
seconds after DSI error interrupt.

<3>[  342.517620] mdss_dsi_fifo_status: status=44441000

<3>[  342.522351] mdss_dsi_timeout_status: status=1

<3>[  342.526980] mdss_dsi_err_intr_ctrl: intr=3210002 enable=1

<3>[  342.693365] mdss_dsi_cmds_rx: failed to tx cmd = 0xa
             -> This causes a CMD DMA timeout even though the
CMD_DMA_DONE interrupt arrived.

Change-Id: I82ba142d4da4ae5f4a1a2761c32b8af7964b538b
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Sivalatha Chakrala <sivala@codeaurora.org>