powerpc: Add support for CoreInt delivery of interrupts on MPIC

CoreInt provides a mechansim to deliver the IRQ vector directly
into the core on an interrupt (via the SPR EPR) rather than having
to go IACK on the PIC.  This is suppose to provide an improvment
in interrupt latency by reducing the time to get the IRQ vector.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>