msm: clock-local2: Insert dummy write in branch_clk_set_flags()

8974v2.2 will have a requirement for FORCE_MEM_CORE_ON and
FORCE_MEM_PERIPH_ON bits to be set at least two bus clock
cycles apart. Add an extra register write to guarantee this.

This is preferably to inserting an explicit delay, since even
1 us is far more than necessary and would add needless latency.

Change-Id: I1b0f1588067690c0978b629ffab72ebb287b8cb1
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>