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Commit c8f7cd1b authored by Aparna Das's avatar Aparna Das
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ARM: dts: msm: ack cti interrupt in atomic context for cpu0 



Add missing CoreSight cpu0 CTI device tree entry to be able to call
api to acknowledge CTI trigger interrupt in atomic context, making
the functionality consistent with all other cpus.

Change-Id: I9e43ea7ed545941d6168934307fc8b20022443d7
Signed-off-by: default avatarAparna Das <adas@codeaurora.org>
parent ff86e4ff
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