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Commit c5f904cf authored by Sarangdhar Joshi's avatar Sarangdhar Joshi
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ARM: dts: msm: add coresight byte counter interrupt for msmzirc



Add device tree entry to support CoreSight byte counter interrupt feature
which raises an interrupt when number of bytes transferred reaches a
programmable threshold.

Change-Id: Ifb2fc271d0fc6fb0c79107ca9609d496e59cb558
Signed-off-by: default avatarSarangdhar Joshi <spjoshi@codeaurora.org>
parent 7e52eb14
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