power: pm8921-bms: fix ccadc accuracy

The bms ccadc counters are incremented/decremented every 56 ticks of the
sleep clock not 55. Correct the tick count.

Also sleep clock is derived by dividing the 19.2Mhz clock by 586. Hence
the HZ count of the sleep clock should be 32764 instead of 32768. Fix
this too.

CRs-Fixed: 381923
Change-Id: I213b3618d33a60533580f4dd2d6644e18a97fcf9
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>