qcom: clk: Configure wakeup cycles and sleep cycles for gmem clock

gcc_oxili_gmem_clk configure wakeup cycle and sleep cycles to Number
of clock cycle 1,i.e 0x0 for dynamic power gating.

Change-Id: I28ae61474f818773acb303d1c5f4b4ef635fbb13
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
Signed-off-by: Bharat Pawar <bpawar@codeaurora.org>
Signed-off-by: Nirmal Abraham <nabrah@codeaurora.org>