ARM: dts: msm: add coresight byte counter interrupt for 8610
The CoreSight block can produce an interrupt on transfer of
programmed number of bytes to ETR-memory. Add device tree
entry to support this feature.
Change-Id: Ic86111ba4c16a8300cd5a445c5a33ac4ccbd19a1
Signed-off-by:
Pushkar Joshi <pushkarj@codeaurora.org>
Loading
Please register or sign in to comment