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Commit 99e93be2 authored by Pushkar Joshi's avatar Pushkar Joshi Committed by Stephen Boyd
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ARM: dts: msm: add coresight byte counter interrupt for 8610



The CoreSight block can produce an interrupt on transfer of
programmed number of bytes to ETR-memory. Add device tree
entry to support this feature.

Change-Id: Ic86111ba4c16a8300cd5a445c5a33ac4ccbd19a1
Signed-off-by: default avatarPushkar Joshi <pushkarj@codeaurora.org>
parent dcf36a6e
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