USB: ice40-hcd: Implement the correct power-up sequence

The 19.2 MHZ clock is supplied to the bridge chip from the MSM.
This clock is not required during configuration loading. Enable it
after configuration loading and before bringing the bridge chip out
of the reset. The bridge chip exits the reset by sampling the
falling edge of the reset line. As per the data book, the reset
line needs to be asserted 0 to 1 twice with 100 usec pulse width.

If the power-up sequence is failed, retry 3 times before failing the
probe.

CRs-Fixed: 643157
Change-Id: I76a95f84969b581fd65992ca7f248a761dcdfdeb
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>