usb: xhci-msm-hsic: Handle power event irq properly

There is a possibility of race between power event irq
acknowledgement and unblocking of suspend thread. In
this case if hsic core clock gets disabled as a result
of unblocking of suspend thread before completion of a
register write to acknowledge irq then irq remains
pending. Irq gets fired again after hsic core clock is
re-enabled as a result of resume. This increments
completion variable counter twice and suspend thread
never waits for power event irq before disabling hsic
clocks. This results into phy instability. Hence add
memory barrier to avoid this race condition. Also
enable power event irq only when entering to low power
mode and disable it as soon as power event irq unblocks
suspend thread.

CRs-Fixed: 575423
Change-Id: Idefc85da6b1aba64eecfcf44878a39a044665f94
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>