msm: Add QPNP interrupt support

QPNP is a Qualcomm SPMI based implementation that specifies 256
devices per SPMI slave ID, with up to 8 interrupts per device.
This brings the theoretical max interrupt support to 32768 per
bus for this architecture.

This driver implements the standard irq chip interfaces to
support QPNP. The chip driver is informed of Device Tree
configuration through a notifier interface. Once informed of an
interrupt, it will allocate resources on the fly. In order to
support this large logical interrupt range, we require SPARSE_IRQ
to be enabled.

This driver supports Device Tree interrupt specs with a cell size
of three. These are comprised of the the slave ID, peripheral ID
and irq number.

Change-Id: Ic7847bafe6598a84ab3650df7c95bb605aefbe62
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>