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Commit 7dad01c0 authored by Ajay Singh Parmar's avatar Ajay Singh Parmar
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msm: clock-mdss-8974: Enable AHB clock before register access 



Enable the MDSS AHB clock for proper HDMI PHY PLL register
access. Disable the MDSS AHB clock after register access.

Change-Id: Ice8e723333f3c041bc1cffa2ebc8d7d40a8817d2
Signed-off-by: default avatarAjay Singh Parmar <aparmar@codeaurora.org>
parent 0d6eafbe
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