clk: qcom: Add use_max_uV support for vdd_class

Multiple vdd_class might share same set of regulators. If fmax for
different vdd_class don't have same max level vote, there
could be a conflict when setting voltage on the regulator.

Add a flag use_max_uV to vote INT_MAX as max_uV when calling
regulator_set_voltage(). Constraints in regulator driver makes sure
final voltage meets the requirement of that regulator's
operational range.

Change-Id: I9361510ac31e1c9a46bbb02ddcd25639591e28a2
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>