usb: dwc3: gadget: check link trb after free_slot is increased

In ISOC transfers, when free_slot points to the last TRB (i.e. Link
TRB), and all queued requests meet Missed Interval Isoc error, busy_slot
points to trb0.
	busy_slot->trb0
		   trb1
		   ...
	free_slot->trb31(Link TRB)

After end transfer and receiving the XferNotReady event, trb_left is
caculated as 1 which is wrong, and no TRB will be primed to the
endpoint.

The root cause is free_slot is not increased the same way as busy_slot.
When busy_slot is increased by one, it checks if points to a link TRB
after increasement, but free_slot checks it before increasement.
free_slot should behave the same as busy_slot to make the trb_left
caculation correct.

Change-Id: I73fea6d2faec370f0426c47f8bc6c82f21fc70e6
Signed-off-by: Zhuang Jin Can <jin.can.zhuang@intel.com>
Signed-off-by: Jiebing Li <jiebing.li@intel.com>
Patch-mainline: linux-usb @ 2014-05-15 9:58:49
[dovl@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Dov Levenglick <dovl@codeaurora.org>