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Commit 5d7eae8a authored by Praneeth Paladugu's avatar Praneeth Paladugu Committed by Vikash Garodia
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msm: vidc: Check clocks state before Venus AXI halt



Venus AXI registers need venus VBIF clock. Without clock,
the register access may cause unknown behavior. Hence
check the clock state before accessing the register.

CRs-Fixed: 772609
Change-Id: I86fe8e85e497d0534b63d4a8af22e2f0c3b84659
Signed-off-by: default avatarPraneeth Paladugu <ppaladug@codeaurora.org>
parent aa7b16b7
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