Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 592d35ae authored by Junjie Wu's avatar Junjie Wu
Browse files

ARM: dts: qcom: Use correct XO clock for GCC/MMSS 



GCC/MMSS use XO clock to derive the correct rate of PLLs. cxo_gcc and
cxo_mmss used previously are dummy voter clocks that have a fixed rate
of 1000. This leads to wrong calculation of PLL rate.

Use the correct XO clock for GCC/MMSS.

Change-Id: Ieb05897ec93661624dbc842d8619ae40e48c10bc
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent 99b16ba9

arch/arm/boot/dts/qcom/msmplutonium.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -405,7 +405,7 @@ 
		reg-names = "cc_base";

		vdd_dig-supply = <&pmplutonium_s1_corner>;

		clock-names = "xo", "xo_a_clk";

		clocks = <&clock_rpm clk_cxo_gcc>,

		clocks = <&clock_rpm clk_cxo_clk_src>,

		         <&clock_rpm clk_cxo_clk_src_ao>;

		#clock-cells = <1>;

	};
@@ -416,7 +416,7 @@ 
		reg-names = "cc_base";

		vdd_dig-supply = <&pmplutonium_s1_corner>;

		clock-names = "xo", "gpll0", "mmssnoc_ahb";

		clocks = <&clock_rpm clk_cxo_mmss>,

		clocks = <&clock_rpm clk_cxo_clk_src>,

		         <&clock_gcc clk_gpll0_out_mmsscc>,

			 <&clock_rpm clk_mmssnoc_ahb_clk>;

		#clock-cells = <1>;