mdss: display: add mdp core clock to dsi clock control

Since mdss interrupts are generated in mdp core clock domain,
mdp clock need to be enabled to have dsi interrupt be delivered
during dsi dcs command send and receive. Request of bus bandwidth
also needed to allow dsi controller to fetch dcs commands over
AXI bus.

CRs-fixed: 516172
Change-Id: I6e10cc5a193c9eb06803637e0432ec72f069377b
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>