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Commit 4f5e130a authored by Kiran Kandi's avatar Kiran Kandi Committed by Stephen Boyd
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ASoC: msm8974: Add Support for Tertiary MI2S CPU DIA 



Tertiary MI2S block has 2 serial data lines. They can be configured
to either Rx or TX direction. RX and TX paths share same bit clock
and word select.

Change-Id: I4be2f6c645a35ed2608bfde0c74722ccb02d0889
Signed-off-by: default avatarKiran Kandi <kkandi@codeaurora.org>
parent 684b2ed0
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