msm_serial_hs: Programming BCR Register

UART Core is showing inconsistent behaviour in firing
Stale Timeout Interrupt. Stale Timeout is not happening
at some points. After programming the BCR register the
Stale Timeout is happening as expected.
Also fix the BCR register offset to avoid instablilities when
console is disabled.

CRs-Fixed: 590176, 628523
Change-Id: I5a2522b87fe0951cad80e56f8f880c214d2d3bb5
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>