msm: clock-pll: Add clk_round/set_rate() support for fixed rate PLLs

For any clock that dynamically decides the right parent to use during a
clk_set_rate() call, the parents need to support clk_round_rate() and
clk_set_rate() APIs to aid with the decision making. Since PLLs could be
parents to such clocks, add support for these clk_set_rate() and
clk_round_rate() to fixed rate PLLs.

clk_round_rate() always returns the fixed rate of the PLL and
clk_set_rate() fails for any rate that's not equal to the fixed rate of the
PLL.

Change-Id: I867e253040bd9d01f9a8a8437adf511553bfcbfe
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>