msm: mdss: correct the flush bit for TIMING_2 interface for 8939

On 8939, the flush bit for TIMING_2 interface is BIT-31 whereas,
it is BIT-29 for other targets. Add change to take care of this.
Also the CTL flush bit for timing interfaces should be based on
ctx->intf_num variable rather than ctl->intf_num. This is to
handle cases related to destination split.

Change-Id: I8c750714ca931341e179057f5c53edce0ad2803e
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>