mmc: sdhci-msm: Fix issue with power save bit enablement

The power save bit is currently enabled based on the clock
rate (clk_rate > 400KHz) within struct sdhci_msm_host. But this
clk_rate is updated with the latest value down in this function
sdhci_msm_set_clock(). So during runtime/system resume when the
card is still in initialization phase, the power save bit is
getting enabled when sdhci_msm_set_clock() is called for the
first time based on the previous rate which is wrong.

Change-Id: I05dc8a4a760f658935de3831aaf8dd3b2b996466
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>