msm: spm-v2: Store voltage levels into PMIC_DATA3

On certain targets, where the SPM controls the power supply for each
core, the SPM power down sequence takes care of restoring the Voltage
level after a power collapse to the appropriate sleep level. The active
voltage level is stored in the PMIC_DATA_3 register and SPM state
machine uses the data in this register to restore the voltage to the
current active level.

Change-Id: I4a25440e818abdefec8cdfd3491fe9a7d772aab4
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>