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Commit 32c4b8f0 authored by Huaibin Yang's avatar Huaibin Yang Committed by Stephen Boyd
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msm_fb: display: add mdp clk rate calculation for low vbp



For the panels that have low v_back_porch, if h/w FIR scaling is used,
during vbp time, mdp clk should be fast enough to output a line from 4
input lines. MDP rate equation for very small scaling, e.g. 1 or 2
pixels' upscaling or downscaling cannot cover this case, where
underruns are seen on those panels.

Change-Id: I4f35f98c2c1bc4ef04dfee193427bd3ff674945d
Signed-off-by: default avatarHuaibin Yang <huaibiny@codeaurora.org>
parent 1e923f89
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