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Commit 28b7b5e1 authored by Manu Gautam's avatar Manu Gautam Committed by Stephen Boyd
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USB: xhci: Add RESET delay quirk for DWC3 controller



In Synopsis DWC3 controller, XHCI RESET takes some time complete.
If PIPE RESET is not complete by the time USBCMD.RUN bit is set
then HC fails to carry out SuperSpeed transfers.
Workaround is to give worst case pipe delay ~350us after resetting
DWC3.

Change-Id: I42a6eb69e5718aafd1d8bb0b32f44a4807a7dc3f
CRs-fixed: 490545
Signed-off-by: default avatarManu Gautam <mgautam@codeaurora.org>
parent 95c1b60f
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