dma: barrier api for coherent memory before and after dma

Coherent memory in ARMv6+ could be StronglyOrdered or Normal. On ARMv7
StronglyOrdered guarantees program order execution only within 1KB and
Normal memory could have speculative fetches on them. Hence we need
barrier operations before and after dma for coherent memory.

Signed-off-by: Abhijeet Dharmapurikar <adharmap@quicinc.com>
Change-Id: I33a5f37af7114a7bf13d6b6706c4eca1340b5e41
(cherry picked from commit 32d12f613584053674ed6064a98aa2515aece9a0)

and also

msm: change dma_coherent_pre/post_ops() to use COHERENT_IS_NORMAL

Clean the #if nesting by using the COHERENT_IS_NORMAL flag. Introduce a
compiler barrier() in the pre case when COHERENT_IS_NORMAL is 0 and arch is
not coherent. Note that for Xscale we will have to force dmb() as it uses
kmalloc for coherent memory.

Change-Id: I1753fc62f5dfa3333c65269ab1815cd29e5698f7
Signed-off-by: Abhijeet Dharmapurikar <adharmap@quicinc.com>
(cherry picked from commit 496709819ea8e94acd3b781bd64dc54eba940226)