msm: pm: Add support to selectively flush L1/L2 cache

On some targets, TZ flushes both secure/non-secure data from the cache. On
these targets, the PM code need not flush L1/L2 cache to reduce the latency
associated walking through L1/L2 lines to be cleaned.

Change-Id: Ic4f628ce71878ce26ee8b73f6b05e21cddb46429
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>