iommu/arm-smmu: set CBARn.BPSHCFG to NSH for s1-s2-bypass contexts

Whilst trying to bring-up an SMMUv2 implementation with the table
walker plumbed into a coherent interconnect, I noticed that the memory
transactions targetting the CPU caches from the SMMU were marked as
outer-shareable instead of inner-shareable.

After a bunch of digging, it seems that we actually need to program
CBARn.BPSHCFG for s1-s2-bypass contexts to act as non-shareable in order
for the shareability configured in the corresponding TTBCR not to be
overridden with an outer-shareable attribute.

Change-Id: I10e25da97bd9786414f544fe2cb23b08e149c0d8
Cc: <stable@vger.kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 57ca90f6800987ac274d7ba065ae6692cdf9bcd7
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git


Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>