ASoC: wcd9310: Fix DMIC current leakage after disable

Observed after disabling DMIC path, some DMICs observe
power leakage of around 2mA and affecting power numbers.
This happens due to the DMIC clock runs off MCLK. 2 Stage
of Dividers are used to  generate various DMIC Clock Freq.
Since the SW Enable/Disabling is async to MCLK, the divider
will either hold the last stage 0 or 1.
Manually force the digital mic clock pin to GPIO mode from
functional mode through the TLMM mux option and force the value
of DMIC voltage to 0V. This will avoid any current leakage.

CRs-Fixed: 504468
Change-Id: I720fadda77b59454feb1a64d0c4951a6c09de66c
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>