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Commit 0f2fa40e authored by Maxime Coquelin's avatar Maxime Coquelin Committed by Linus Walleij
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ARM: mach-ux500: enable 128KB way L2 cache on DB8540



DB8540 L2 was configured with 64KB way size, but it has 128KB as AP9540.

Fix this by modifying ux500_l2x0_init() to use 128KB way size for all
cpus in the x540 family.

Signed-off-by: default avatarMaxime Coquelin <maxime.coquelin@stericsson.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarFabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent cca438b5
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