msm: mdss: dsi: fix incorrect lane transitions when exiting ULPS

When MDSS idle power collapse and the ULPS features are both enabled,
the DSI PHY is clamped in ULPS state prior to power collapsing the
DSI controller. In the resume sequence, the DSI controller is reset back
into LP11 state. As such, the controller state needs to be transitioned
to ULPS prior to unclamping the PHY by placing a ULPS entry request on
the controller. This requires the controller clocks to be on, otherwise
this request get processed when the clocks are eventually turned on after
removing the clamps. This can result in an unintentional ULPS transition
on the MIPI lanes and can cause display corruption. Fix this issue by
ensuring that the escape clock is turned on prior to the ULPS entry request.

Change-Id: Ib9277bb57964f6e49b472bf7dd0fbb76695865af
Signed-off-by: Sachin Bhayare <sachin.bhayare@codeaurora.org>