msm: mdss: modify the dual DSI clock control sequence

Currently, for dual DSI cases while turning off the DSI clocks,
the DSI clamps are getting enabled before turning off the DSI PLL.
Due to this, there are DSI PLL lock failures seen while enabling
the clocks back while coming out of idle screen on command
mode panels. Change the clock sequence by making sure to enable
the clamps only after the DSI PLL is disabled. Also while turning
ON the clocks, make sure to disable the clamps before the DSI PLL
is enabled.

Change-Id: I545f17b85866553d1ff1cea42a6eaa2a84f8f014
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>