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Commit 00b8dd7d authored by Clemens Ladisch's avatar Clemens Ladisch Committed by Takashi Iwai
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ALSA: virtuoso: use lower master clock with H6 daughterboard



Because of the unshielded connector cable, it is important to use as low
a master clock frequency as possible with the H6.

For double rate modes (64-96 kHz), the MCLK rate is unconditionally
lowered from 512x to 256x because the higher rate would not improve
anything.

Signed-off-by: default avatarClemens Ladisch <clemens@ladisch.de>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent d353eaa9
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