ARM: zImage: __armv3_mpu_cache_flush: respect should-be-zero specification

Probably the register content for cache operations is "don't care" in
practice, but as r1 is explicitly zeroed, use that one.

Acked-by: Eric Miao <eric.miao@canonical.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>