Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit 04b55c47 authored by Shmulik Ravid's avatar Shmulik Ravid Committed by Jesse Barnes
Browse files

PCI: read-modify-write the pcie device control register when initiating pcie flr



The pcie_flr routine writes the device control register with the FLR bit
set clearing all other fields for the FLR duration. Among other fields,
the Max_Payload_Size is also cleared which can cause errors if there are
transactions lurking in the HW pipeline. The patch replaces the blank
write with read-modify-write of the control register keeping the other
fields intact.

Signed-off-by: default avatarShmulik Ravid <shmulikr@broadcom.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent bb965401
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment