ASoC: wm8510 pll settings

When setting WM8510_MCLKDIV the pll was turned off.

When setting pll frequency you got twice the expected freq, because
the  code calculated  with postscaler of 8,  but  the hardware divide by 4.

Signed-off-by: Jonas Andersson <jonas@microbit.se>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>