ARM: S5PV310: Limit the irqs which support cascade interrupt
The irqs from SPI(0) to SPI(39) and SPI(51), SPI(53) are connected to the interrupt combiner. This patch limits the irqs which should be initialized to support cascade interrupt. Signed-off-by:Changhwan Youn <chaos.youn@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
Loading
Please register or sign in to comment