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Unverified Commit d821ae4d authored by Will Deacon's avatar Will Deacon Committed by basamaryan
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BACKPORT: arm64: tlb: Avoid synchronous TLBIs when freeing page tables



By selecting HAVE_RCU_TABLE_INVALIDATE, we can rely on tlb_flush() being
called if we fail to batch table pages for freeing. This in turn allows
us to postpone walk-cache invalidation until tlb_finish_mmu(), which
avoids lots of unnecessary DSBs and means we can shoot down the ASID if
the range is large enough.

Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Change-Id: Ie25f4be366f5a170adbb0e64c7d57ecc2b379a58
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
[cyberknight777: Backport to msm-4.14]
Signed-off-by: default avatarCyber Knight <cyberknight755@gmail.com>
parent 5200c58d
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