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Commit c02c0d87 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "soc: qcom: Add support for atoll into socinfo driver"

parents 69a02d7e c2d6a21d

Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt

+2 −1
Original line number Diff line number Diff line
@@ -99,7 +99,8 @@ compatible devices: 
		qcom,sdmshrike-llcc,

		qcom,sm6150-llcc,

		qcom,sdmmagpie-llcc,

		qcom,sdxprairie-llcc

		qcom,sdxprairie-llcc,

		qcom,atoll-llcc



Example:

arch/arm64/boot/dts/qcom/atoll.dtsi

+51 −0
Original line number Diff line number Diff line
@@ -504,6 +504,30 @@ 
				       0x10100 0x10100 0x25900 0x25900>;

	};



	qcom,chd_sliver {

		compatible = "qcom,core-hang-detect";

		label = "silver";

		qcom,threshold-arr = <0x18000058 0x18010058

				      0x18020058 0x18030058

				      0x18040058 0x18050058>;

		qcom,config-arr = <0x18000060 0x18010060

				   0x18020060 0x18030060

				   0x18040060 0x18050060>;

	};



	qcom,chd_gold {

		compatible = "qcom,core-hang-detect";

		label = "gold";

		qcom,threshold-arr = <0x18060058 0x18070058>;

		qcom,config-arr = <0x18060060 0x18070060>;

	};



	qcom,ghd {

		compatible = "qcom,gladiator-hang-detect-v3";

		qcom,threshold-arr = <0x17e0041C>;

		qcom,config-reg = <0x17e00434>;

	};



	kryo-erp {

		compatible = "arm,arm64-kryo-cpu-erp";

		interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>,
@@ -513,6 +537,33 @@ 
				  "l3-scu-faultirq";

	};



	qcom,llcc@9200000 {

		compatible = "qcom,llcc-core", "syscon", "simple-mfd";

		reg = <0x9200000 0x450000>;

		reg-names = "llcc_base";

		qcom,llcc-banks-off = <0x0>;

		qcom,llcc-broadcast-off = <0x400000>;



		llcc: qcom,atoll-llcc {

			compatible = "qcom,atoll-llcc";

			#cache-cells = <1>;

			max-slices = <32>;

			cap-based-alloc-and-pwr-collapse;

		};



		qcom,llcc-erp {

			compatible = "qcom,llcc-erp";

		};



		qcom,llcc-amon {

			compatible = "qcom,llcc-amon";

		};



		LLCC_1: llcc_1_dcache {

			qcom,dump-size = <0x6c000>;

		};

	};



	cpuss_dump {

		compatible = "qcom,cpuss-dump";

arch/arm64/configs/vendor/atoll-perf_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -555,6 +555,7 @@ CONFIG_QCOM_RUN_QUEUE_STATS=y 
CONFIG_QCOM_LLCC=y

CONFIG_QCOM_SM6150_LLCC=y

CONFIG_QCOM_SDMMAGPIE_LLCC=y

CONFIG_QCOM_ATOLL_LLCC=y

CONFIG_QCOM_LLCC_PERFMON=m

CONFIG_QCOM_QMI_HELPERS=y

CONFIG_QCOM_SMEM=y

arch/arm64/configs/vendor/atoll_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -585,6 +585,7 @@ CONFIG_QCOM_RUN_QUEUE_STATS=y 
CONFIG_QCOM_LLCC=y

CONFIG_QCOM_SM6150_LLCC=y

CONFIG_QCOM_SDMMAGPIE_LLCC=y

CONFIG_QCOM_ATOLL_LLCC=y

CONFIG_QCOM_LLCC_PERFMON=m

CONFIG_QCOM_QMI_HELPERS=y

CONFIG_QCOM_SMEM=y

drivers/soc/qcom/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -102,6 +102,14 @@ config QCOM_SDMMAGPIE_LLCC 
	  data required to configure LLCC so that clients can start using the

	  LLCC slices.



config QCOM_ATOLL_LLCC

	tristate "Qualcomm Technologies, Inc. ATOLL LLCC driver"

	depends on QCOM_LLCC

	help

	  Say yes here to enable the LLCC driver for ATOLL. This provides

	  data required to configure LLCC so that clients can start using the

	  LLCC slices.



config QCOM_SDXPRAIRIE_LLCC

	tristate "Qualcomm Technologies, Inc. SDXPRAIRIE LLCC driver"

	depends on QCOM_LLCC