Merge "coresight: cti: Add snapshot of Coresight CTI driver" into msm-next

	  layout using the generic DT graph presentation found in

	  "bindings/graph.txt".

	* coresight-name: unique descriptive name of the component.

* Additional required properties for System Trace Macrocells (STM):

	* reg: along with the physical base address and length of the register

	  set as described above, another entry is required to describe the

	* compatible: Currently supported value is (note the absence of the

	  AMBA markee):

		- "arm,coresight-replicator"

		- "arm,coresight-cti"

	* port or ports: same as above.

	* coresight-name: unique descriptive name of the component.

* Optional properties for all components:

	* reg-names: names corresponding to each reg property value.

* Optional properties for ETM/PTMs:

	* arm,cp14: must be present if the system accesses ETM/PTM management

	* arm,buffer-size: size of contiguous buffer space for TMC ETR

	 (embedded trace router)

	* arm,default-sink: represents the default compile time CoreSight sink

	* coresight-ctis: represents flush and reset CTIs for TMC buffer

	* qcom,force-reg-dump: enables TMC reg dump support

	* arm,sg-enable : indicates whether scatter gather feature is enabled

	  by default for TMC ETR configuration.

Example:

	  properly, please refer Documentation/trace/coresight-cpu-debug.txt

	  for detailed description and the example for usage.

config CORESIGHT_CTI

	bool "CoreSight Cross Trigger Interface driver"

	help

	  This driver provides support for Cross Trigger Interface that is

	  used to input or output i.e. pass cross trigger events from one

	  hardware component to another. It can also be used to pass

	  software generated events.

endif

obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o

obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o

obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o

obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o