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Commit b29f9e92 authored by Peter De Schrijver's avatar Peter De Schrijver
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clk: tegra: add TEGRA_PERIPH_NO_GATE



Tegra124 has a clock which consists of a mux and a fractional divider.
Add support for this.

Signed-off-by: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent bc44275b
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